Given the current state of the art in micro-electronic devices, there is a need to develop low cost, high production rate fabrication techniques for large area electronics. Such techniques are important in the manufacture of large displays, electronic paper, electronic signage and large area sensing arrays. Because the surface area of these electronic devices is so large, the substrate material and fabrication processes should be relatively inexpensive if the finished products are to be reasonably priced, e.g. on the order of $10/ft2 
Typically, electronic devices may be fabricated using a lithography process such as photolithography. In this method of fabrication, the desired pattern is photographically projected onto a substrate to pattern a photoresist layer. The subsequent etching and deposition steps are used to add and subtract materials as required for a given layer. Subsequent layers are fabricated using additional photo-lithographically defined patterns.
For the photolithography method to result in useful devices, the deposited layers are often carefully aligned and the substrate is usually flat and dimensionally stable. The process also requires a low particulate environment, thereby necessitating a clean room. Further, there are limitations on the size of electronic devices that can be manufactured. Large areas are typically patterned using “step and repeat” sequential processing in order to achieve the desired large area device. All these requirements contribute to the current high cost of building appropriate fabrication facilities and manufacturing high quality, large area devices using photolithography.
In order to create low cost, large area electronic devices, several techniques have recently emerged as potential means for large area fabrication. Three such methodologies that can be used to form larger electronic structures include: jetting of material, imprint lithography, and laser scanning of patterns into a photoresist.
Using an inkjet technology similar to that used in ink jet printers, materials are added to a substrate or structure by the precise placement (jetting) of the materials required to define the desired electronic circuitry. This inkjet placement of materials is an additive process that adds material directly to the structure, often in the precise location desired. For layers with small area coverage, adding the actual electronic device materials is very economical and wastes little of the underlying or added materials. This is in contrast to subtractive or etch processes, wherein much of the various materials end up in waste solvents or gases. Significant material waste adds to the costs of materials and the costs associated with environmental compliance. An added feature of jetting is that the pattern of the jetted material can readily be changed to meet specific engineering requirements.
The disadvantages of the inkjet process described above include: (1) the process is not capable of printing features smaller than about 25 um because there is considerable variation in the drop trajectory; this variation also results in ragged feature delineations and splattering on a 10 um level; (2) the requirement to “inkjet” apply materials restricts the material set to those with fairly demanding viscosity, drying, and wetting requirements; (3) the process is inherently sequential and therefore has low throughput; and (4) accurate alignment of subsequent layers requires pattern identification, as well as control of the inkjet pen position.
Considering the second alternative, imprint lithography, a structure is defined by an imprint pattern that is imposed onto a liquid or deformable layer. Typically, a UV curable adhesive is patterned using a template. After patterning, the adhesive is hardened via UV exposure and then released from the template. Imprint lithography is capable of very high throughput because the structures are produced simultaneously across the entire imprint template/layer contact area. Moreover, the method is capable of very high resolution; features as small as 50 nm have been reported. The method is also compatible with flexible media or substrates.
The major disadvantage with imprint lithography is that it is difficult to align various layers. Typically the process may include masking followed by subtractive or etch processing steps wherein layer alignment is critical, especially with a flexible substrate. A layer is deposited and then patterned using a resist material that will ultimately define the structure during subsequent etching steps. Recently, a method of self-aligned imprint lithography, SAIL, has addressed many of the layer to layer alignment problems found with traditional imprint lithography techniques. The basics of this process are set forth and described in U.S. patent application Ser. No. 10/184,567, now U.S. Pat. No. 6,861,365, the disclosure of which is incorporated herein by reference.
The SAIL technique uses a 3D patterned resist and is typically employed in roll-to-roll processing. As the 3D resist is flexible, the pattern will stretch or distort to the same degree as the substrate. As such, a SAIL roll-to-roll fabrication process may be employed to provide low cost manufacturing solutions for devices such as flat and/or flexible displays, or other devices suitable for roll-to-roll processing. It should also be realized that the disclosed method may be employed using a non-flexible substrate while remaining within the spirit and scope of at least one embodiment. The SAIL process, like the jetting method discussed above, eliminates the need for expensive, ultra low particle count clean rooms. Further, photolithography is not required.
Finally, scanning laser technology is used to expose patterns directly into photoresist coated layers. A Meyer bar, gravure roller, slot-die coater, spin caster, or other device is used to deposit a well defined layer of photoresist over a deposited layer. A tightly focused laser is scanned across the layer, exposing the resist. Subsequently, the resist is developed, after which etching can be used to pattern the underlying layer.
Precision is important since the optical properties of the layers beneath the resist may affect the absorption of the laser energy within the resist layer. This technology is fundamentally subtractive, however it is capable of faster speeds than the jetting method, and does not require unique material properties such as those defined for jetted materials. The method shares with jetting technology the ability to adapt the pattern to conform to changes in the dimensions of the substrate associated with previous patterning steps.
Considered individually, none of the three processes described above, nor other processes disclosed in the prior art, provide for high volume, high quality, low cost fabrication of large area electronic devices. The previously known processes either do not “scale up” well for the manufacture of large devices, and/or the costs associated with wasted (removed) materials and low throughput are prohibitive.
Hence, there is a need for a system and method of forming electronic devices that overcomes one or more of the drawbacks identified above.